As part of the Third Generation Partnership Project (3GPP) Release 13, a study on downlink enhancements for Universal Mobile Telecommunication System (UMTS) was performed. Within the area of expertise of the Technical Specification Group (TSG) Radio Access Network (RAN) Working Group 1 (WG1), the study item description (SID) included the possibility of introducing a new algorithm for processing downlink (DL) transmit power control (TPC) commands. From the investigations performed during the study item phase, two candidate algorithms for processing DL TPC commands were derived, which were respectively described as “Repetition of TPC commands” and “Discontinuous transmission (DTX) of TPC commands” algorithms.
In the 3GPP meeting RAN1 #82, the “DTX of TPC commands” algorithm was selected by the TSG RAN WG1 as the new power control algorithm (hereafter Algorithm 3) to be standardized in the 3GPP Release-13. As a general description, the existing Universal Mobile Telecommunications System (UMTS) power control algorithms 1 and 2 both follow a 1500 Hz TPC frequency operation in downlink (i.e., the base station transmits a new TPC command in the downlink in every single slot), while the so called “DTX of TPC commands” algorithm slows down the TPC frequency operation in downlink by either a factor of three or five depending on the decimation factor it has configured. In other words, when the Algorithm 3 is configured, only one out of three slots, or only one out of five slots contain a TPC command, while the rest of the slots are decimated (i.e., no transmission is performed).
In RAN1 #82bis, the TSG RAN WG1 continued the discussions on the procedures and/or compatibility issues that until that moment were unclear or required further investigations towards the proper standardization of the power control Algorithm 3 in the Release 13. One of the open technical issues referred to the slot position within a slot-cycle (i.e., a group of slots that is equal to the configured decimated factor) over which the TPC command should be transmitted in the DL.
During the Study Item phase, the operation of the Algorithm 3 was always exemplified by mapping the TPC command to be transmitted in the DL to the first slot within a slot-cycle. In relation to it, during the session held in RAN1 #82 it was questioned whether the Algorithm 3 could use as well (i.e., in a deterministic manner) the last slot within a slot-cycle in order to transmit the DL TPC symbol.
On the other hand, since one of the advantages of the Algorithm 3 is the ability of multiplexing other wireless devices such as user equipments (UEs) in the same TPC symbol while the decimation occurs, during RAN1 #82 it was mentioned that in order to address this advantage of the Algorithm 3, perhaps the DL TPC symbol could be mapped to any slot within the slot-cycle. However, on this point it is noteworthy that the standard already allows (i.e., by assigning suitable combinations of fractional dedicated physical channel (F-DPCH) frame timings and slot formats) multiplexing wireless devices in the same F-DPCH TPC symbol position on the same F-DPCH channelization code. Therefore, it is not really needed to add new signaling for the same purpose (i.e., add signaling to dynamically indicate to the wireless device the slot # within the slot-cycle where the TPC command is supposed to be received).
Nonetheless, during RAN1 #82bis it was pointed out that there is a potential TPC symbol position collision issue in soft handover, if the base stations configured with the Algorithm 3 map in a deterministic manner the TPC command to be transmitted in the DL always in the first slot within a slot-cycle.
The slot position within a slot-cycle over which the TPC command should be transmitted in the DL currently remains as an open issue, which however has to be promptly resolved in order to finalize the standardization of the Algorithm 3 in the Release-13.
Moreover, during the Study Item phase, the F-DPCH was used to exemplify the transmission of the TPC command to be sent in downlink. Background about this physical channel is provided as follows.
The F-DPCH was introduced in Rel-6 in order to reduce the amount of downlink channelization codes used for dedicated channels. Instead of allocating one DPCH for the sole purpose of transmitting one power control command per slot, the F-DPCH allows up to ten wireless devices to share a single channelization code for this purpose. The F-DPCH uses spreading factor 256 and quadrature phase shift keying (QPSK) modulation.
The frame structure of the F-DPCH is straightforward. Each frame of length 10 ms is split into 15 slots, where each slot consists of 2560 chips. Each slot contains 10 symbols where each symbol consists of 2 channel bits. Every symbol corresponds to one TPC command; bit sequence 11 represents TPC command UP and bit sequence 00 represents TPC command DOWN. Consequently, every slot can carry up to 10 TPC commands and hence one F-DPCH can accommodate up to 10 wireless devices.
In the specifications, wireless devices are allocated different TPC command symbols to listen to by assigning the wireless device a certain F-DPCH channelization code and F-DPCH slot format to listen to. The concept is illustrated by FIG. 1 and Table 1 below.
TABLE 1ChannelChannelSlotBitSymbolNOFF1NTPCNOFF2FormatRateRateBits/Bits/Bits/Bits/#i(kbps)(ksps)SFSlotSlotSlotSlot031.5256202216131.5256204214231.5256206212331.5256208210431.5256201028531.5256201226631.5256201424731.5256201622831.5256201820931.5256200218
The F-DPCH can be configured with ten different slot formats (from 0 to 9, i.e. #0, #1, #2, #3, #4, #5, #6, #7, #8, and #9), being the difference between the location of the TPC symbol position within a slot.
When the “DTX of TPC commands” algorithm is in use, only one TPC command is transmitted in the downlink per slot cycle (i.e., one out of three slots, or one out of five slots depending on the decimation factor).
When a wireless device is in soft handover (SHO), multiple TPC commands may be received in each slot from different cells in the active set. Assuming the slot format #9 of the F-DPCH is configured to be used with the Algorithm 3, if in SHO the base stations map the TPC command to be transmitted in the DL to any of the first two TPC symbol positions of the first slot within a slot-cycle, and any of the radio links other than the one that was configured first has the first 512 chips of the non-decimated slot unavailable, then the TPC command of those radio links would have to be mapped to another TPC symbol position within the first slot. Nonetheless, receiving TPC symbols from different radio links more than 512 chips apart from the starting boundary of the non-decimated slot would make it impossible for wireless device to combine the TPC commands received from different radio links in the DL when the F-DPCH is configured because there is a delay of 512 chips before the wireless device is able to start the so called “TPC command combining period.” The issue is illustrated in FIG. 2. The same problem exists when the F-DPCH slot format #0 is used.